SiP System–in–Package Design and Simulation: Mentor EE Flow Advanced Design Guide

An advanced reference documenting, in detail, every step of a real System in Package (SiP) design flow

Written by an engineer at the leading edge of SiP design and implementation, this book demonstrates how to design SiPs using Mentor Graphics Expedition Enterprise Flow. Key topics covered include wire bonding, die stacks, cavity, flip chip and RDL (redistribution layer), Embedded Passive, RF design, concurrent design, Xtreme design, 3D real–time DRC (design rule checking), and SiP manufacture. 

Extensively illustrated throughout, System in Package Design and Simulation covers an array of issues of vital concern for SiP design and fabrication electronics engineers, as well as SiP users, including:  

Designed to function equally well as a reference, tutorial, and self–study, System in Package Design and Simulation is an indispensable working resource for every SiP designer, especially those who use Mentor Graphics design tools. 

Suny Li is a specialist at Mentor Graphics. He graduated with a MSc from BeiHang University in 2000 where he specialized in Science and Technology of Aerospace and Astronautics. He owns four patents for: embedded computer system; an embedded computer system for spacecraft; the mainboard for embedded computer system; and the control–power board for embedded computer system. He worked for several years in the Chinese Academy of Science, for Siemens Mobile China, and AcconSys, and has more than seven years′ experience as Application Engineer with Mentor Graphics software, with a focus on SiP/PCB design and simulation.