ESD in Silicon Integrated Circuits

As high density circuits move deeper into submicron dimensions Electrostatic Discharge (ESD) effects become an increasing concern. This new edition of a classic reference presents a practical and systematic approach to ESD device physics, modelling and design techniques. The authors draw upon their wealth of industrial experience to provide a complete overview of ESD and its implications in the development of advanced integrated circuits.
Fully revised to incorporate the latest industry achievements and featuring:
∗ Design methods for a variety of technologies from 1 micron to the current sub–micron regimes, along with complete design approaches for MOS, BiCMOS and Power MOSFETs.
∗ New sections on ESD design rules, process technology effects, layout approaches, package effects and circuit simulations.
∗ Guidance on the implementation of circuit protection measures for a range of I/O configurations.
∗ Detailed coverage of ESD simulation stress models.
This unique reference provides the means to design protection circuits for a variety of applications and to diagnose and solve ESD problems in IC products. The coverage of state–of–the–art circuit design for ESD prevention will appeal to engineers and scientists working in the fields of IC and transistor design. Graduate students and researchers in device/circuit modeling and semiconductor reliability will appreciate this comprehensive coverage of ESD fundamentals.

Spis treści:
Preface
1. Introduction
Background
The ESD Problem
Protecting against ESD
Outline of the Book
2. ESD Phenomenon
Introduction
Electrostatic Voltage
Discharge
ESD Stress Models
3. Test Methods
Introduction
Human Body Model (HBM)
Machine Model (MM)
Charged Device Model (CDM)
Socket Device Model (SDM)
Metrology, Calibration, Verification
Transmission Line Pulsing (TLP)
Failure Criteria
Summary
4 Physi cs and Operation of ESD Protection Circuits
Introduction
Resistors
Diodes
Transistor Operation
Transistor Operation Under ESD Conditions
Electrothermal Effects
SCR Operation
Conclusion
5 ESD Protection Design Concepts and Strategy
The Qualities of Good ESD Protection
ESD Protection Design Methods
Selecting an ESD Strategy
Summary
6 Design and Layout Requirements
Introduction
Thick Field Device
NMOS Transistors (FPDs)
Gate–Coupled NMOS (GCNMOS)
Gate Driven nMOS (GDNMOS)
SCR Protection Device
ESD Protection Design Synthesis
Total Input Protection
ESD Protection Using Diode–Based Devices
Power Supply Clamps
BiPolar and BiCMOS Protection Circuits
Summary
7 Advanced Protection Design
Introduction
PNP Driven NMOS (PDNMOS)
Substrate Triggered NMOS (STNMOS)
NMOS Triggered NMOS (NTNMOS)
ESD for Mixed Voltage I/O
CDM Protection
SOI Technology
High Voltage Transistors
BiCMOS Protection
RF Designs
General I/O Protection Schemes
Design/layout Errors
Summary
8 Failure Modes, Reliability Issues, and Case Studies
Introduction
Failure Mode Analysis
Reliability and Performance Considerations
Advanced CMOS Input Protection
Optimizing the Input Protection Scheme
Designs for Special Applications
Process Effects on Input Protection Design
Total IC Chip Protection
Power Bus Protection
Internal Chip ESD Damage
Stress Dependent ESD Behavior
Failure Mode Case Studies
Summary
9 Influence of Processing on ESD
Introduction
High Current Behavior
Cross–section of a MOS Transistor
Drain–Source Implant Effects
P–Well Effects
N–Well Effects
Epitaxial Layers and Substrates
Gate Oxides
Silicides
Contacts
Interconnect and Metallization
Gate Length Dependencies
Silicon–On–Insulator (SOI)
Bipolar Transistors
Diodes
Resistors
Reliability Trade&# 8211;Offs
Summary
10 Device Modeling of High Current Effects
Introduction
The Physics of ESD Damage
Thermal ("Second") Breakdown
Analytical Models Using the Heat Equation
Electrothermal Device Simulations
Conclusions
Circuit Simulation Basics, Approaches, and Simulations
Introduction
Modeling the MOSFET
Modeling Bipolar Junction Transistors
Modeling Diffusion Resistors
Modeling Protection Diodes
Simulation of Protection Circuits
Electrothermal Circuit Simulations
Conclusion
12 Conclusions
Long–term Relevance of ESD in ICs
State–of–the–art for ESD Protection
Current Limitations
Future Issues

Okładka tylna:
As high density circuits move deeper into submicron dimensions Electrostatic Discharge (ESD) effects become an increasing concern. This new edition of a classic reference presents a practical and systematic approach to ESD device physics, modelling and design techniques. The authors draw upon their wealth of industrial experience to provide a complete overview of ESD and its implications in the development of advanced integrated circuits.
Fully revised to incorporate the latest industry achievements and featuring:
∗ Design methods for a variety of technologies from 1 micron to the current sub–micron regimes, along with complete design approaches for MOS, BiCMOS and Power MOSFETs.
∗ New sections on ESD design rules, process technology effects, layout approaches, package effects and circuit simulations.
∗ Guidance on the implementation of circuit protection measures for a range of I/O configurations.
∗ Detailed coverage of ESD simulation stress models.
This unique reference provides the means to design protection circuits for a variety of applications and to diagnose and solve ESD problems in IC products. The coverage of state–of–the–art circuit design for ESD prevention will appeal to engin eers and scientists working in the fields of IC and transistor design. Graduate students and researchers in device/circuit modeling and semiconductor reliability will appreciate this comprehensive coverage of ESD fundamentals.