Synchronous Precharge Logic

Precharge logic is used by a variety of industries in applications where processor speed is the primary goal, such as VLSI (very large systems integration) applications. Also called dynamic logic, this type of design uses a clock to synchronize instructions in circuits. This comprehensive book covers the challenges faced by designers when using this logic style, including logic basics, timing, noise considerations, alternative topologies and more. In addition advanced topics such as skew tolerant design are covered in some detail. Overall this is a comprehensive view of precharge logic, which should be useful to graduate students and designers in the field alike. It might also be considered as a supplemental title for courses covering VLSI.

1. Precharge Logic Basics
2. Timing
3. Transistor Sizing
4. Noise Tolerance
5. Topology Considerations
6. Other Precharge Logic Styles
7. Clocked Set-Reset Latches
8. Layout Considerations
9. Appendix: Logical Effort
10. References